Description

ABOUT THE BOOK

The adapted version of very large scale integration design of linear turbo equalizer is intended as text for the research in the field of turbo equalizer to the students pursuing a postgraduate degree in electronics engineering. It should also prove useful to the researchers and other professionals wishing to update their knowledge through reputed scientific literatures.
The objective of this book is to develop in the reader the ability to analyze and design linear turbo equalizer using verilog hardware description language. Linear turbo equalization is a form of joint equalization and decoding in which soft information is iteratively exchanged between the Soft Input Soft output (SISO) equalizer and Soft Input Soft output (SISO) decoder. The proposed design uses the modified least mean square algorithm (LMS) adaptive algorithm for the equalization of received symbols in the design of Soft Input Soft output (SISO) equalizer block. Soft Input Soft output (SISO) decoder block has been designed using sliding window log-MAP algorithm. Linear turbo equalization exhibits better performance in terms of bit error rate (BER) for Proakis channels. The Log-MAP decoding algorithm is selected for implementation of the constituent Soft-Input Soft-Output (SISO) decoder; the algorithm is approximated by a fixed-point representation that achieves the best performance/complexity trade-off. Modified least mean square algorithm is selected for the implementation of Soft-Input Soft Output (SISO) Equalizer as hardware complexity required to design equalizer is small when compared to other equalizers.

This is my belief that the majority of those studying this book would acknowledge of what is inside the very large scale integration design of linear turbo equalizer would help to innovation to its chip design. Furthermore, with the advances in very large scale integration technology and design methodology, linear turbo equalizer design itself has become accessible to an increasing number of researchers.

ABOUT THE AUTHOR

Neha Sharma received the M. Tech. degree in Electronics and Communication Engineering with specialization in Microelectronics & VLSI Design from Rama University, Uttar Pradesh. Since then, she has contributed significantly in the field of academia and research. She has been worked as an Assistant Professor in Naraina College of Engineering and Technology, Kanpur and also as a Teaching Associate in Rama University, Uttar Pradesh, India. She has been served as a member of editorial board, reviewer committee, organizing committee and expert panel in various reputed IEEE conferences and international journals. She has also been served as a coordinator in above. She has filed numerous patents, copyrights and research papers (IEEE Transactions) mostly in electronics to serve the nation in the field of research. She is also an active member of the technical committee of CoDIT, ICSPC as a reviewer.